XLM72 72 channel FPGA Logic Module
XLM72S is a FPGA based logic module with 72 I/O ports. Featuring two 64 Mbit SPI (Serial Peripheral Interface) memories, from one of which its FPGA boots upon power-up, complex logic operations can be programmed and saved on-board.
Multiple user setup files can be saved in the SPI memories beyond the area used for the boot configuration.
activity. All 72 I/O ports are provided on front panel pin headers with ECL levels. In addition by using optional plug-in adapter mini-boards the XLM72S is capable of accepting or outputing directly other signal levels as for instance TTL or NIM.
Main features
- 72 channel logic module with free programmable FPGA functionality
- Can be used as intelligent data buffer, scales / pre-scalers, coincidence registers, time stamper, multi-level trigger logic, digital delay gate generator, histogramming memory
- QT based application for logic setup
- Dual SPI (2 x 64MBit) for configuration storage, selectable boot memory
- Single wide VME module
- 72 programmable front-panel I/O ports, configurable in quartets as either inputs or outputs, organized in four 34-pin and one 8-pin headers,
- I/O ports either ECL or on request NIM or TTL levels (optional)
- One user-programmable FPGA, XC6SLX150 by Xilinx, inc.
- Custom, programmable, in-system reconfigurable VME-bus interface and bus router/arbitrator.
- Two 64-Mbit SPI memories for holding FPGA configuration data and/or other desired non-volatile data.
- Four front-panel LEDs, one indicating VME-bus operation and the remaining three being user-programmable, mapped onto ports of the user FPGA
- Special firmwares on request
Item | Description |
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XLM72S | Programmable VME FPGA module with 72 I/O ports |
Specifications: | |
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Packaging | single wide 6U VME module |
Interface | VME interface embedded |
Inputs / Outputs | 72 I/O ports on 4 x 34 pin headers and 1 x 8 pin header |
mapped to FPGA, can be configured as inputs or outputs in groups of 4 | |
Clocks |
one 80 MHz - shared by the VMEBus interface and FPGA; The clock rate can be reprogrammed to up to 20 MHz, using any of the 12 DCMs (Digital Clock Manager) of the FPGA. |
LED's | 4, 1 x DTACK, 3 programmable User LED’s (green, red, green, yellow) |
FPGA | XC6SLX150 by Xilinx |
System Controller | bus arbiter and / or interrupt handler |
Firmware | Software upgradeable, 4 firmware locations |
Selection via 8 position switch (P=program, C=use) | |
Performance | D32 via USB (EASY-VME): 128 kB/s |
D32 with data buffering: 9...13MB/s (depending on slave module) | |
BLT: 10...15MB/s (depending on slave module) |
Product Data Sheet | |
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XLM72 72 channel FPGA Logic Module: | Print Product Data Sheet |
Documentation | |
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Manual and Tech-Notes : | VM-USB |
Introduction: | WIENER_VME_VXI_VXS_introduction |
Downloads | |
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CD-ROM: | XX-USB |