16 channel Multi functional VME Delay Gate Generator / Logic Module (ECL/LVDS)

The MDGG-16 is a single wide 6U VME multi functional FPGA based delay logic and timing module which provides often needed functions as gate generator & pulse generator, logic fan in - fan out, coincidence register and scaler / pre-scaler. The module has 16 LVDS/ECL inputs and 16 ECL outputs on pin headers and 2 NIM  inputs as well as 4 NIM outputs (Lemo), which are free configurable in regards to their functionality.

The MDGG-16 is based on a XC3S500E FPGA with 36kB of block RAM. One FPGA configuration file can be stored in the on-board flash memory  from which the FPGA can boot at power-on. The flash memory can be reprogrammed via VME for firmware upgrades. The required logic functionality can be programmed in a easy way by the writing configuration data into MDGG-16 registers via VME D32 A24 "write" commands. 

MDGG-16 can be readily customized within the constraints set by the hardware resources. It may be considered an 18-input/20-output/7-diagnostic LED universal logical module for which the user can develop his own firmware using the free XILINX WebPack software.

Hardware features

• A24/D32 VME slave module
• Inputs: 16 LVDS/ECL (pin header) + 2 NIM (Lemo connectors)
• Outputs: 16 ECL (pin header) + 4 NIM (Lemo connectors)
• 8+1 diagnostic LED's
• IRQ capable, with the IRQ level selected by a jumper.

Built-in functions

• Programmable delay / gate / pulse generators, start/stop latches or pre-scalers (8 ns steps)
• Gated or latching scalers with 1kx32FIFO per channel
• bit coincidence register
• Combinatorial gates (2 fold OR of 8 fold AND)
• Flexible configuration and multiplexing of inputs / outputs and logic devices
• Programmable Veto inputs
• VME triggering of logic devices or reset of scalers
• Individually programmable output polarity for all NIM (4) and ECL (16) outputs